LFE5U-25F
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The NC-ECP5-EVAL-001 is a compact FPGA evaluation and integration platform built around the Lattice ECP5 LFE5U-25F low-power FPGA. Designed in the industry-standard DDR2 SODIMM form factor, it enables rapid prototyping and seamless integration into custom carrier boards.
The platform integrates 32 MB SDRAM, 32 MB SPI flash, dual JTAG interfaces and an on-board DAPLINK-compatible debugger (iCELink) — providing a complete out-of-the-box development environment for RISC-V soft cores, custom logic, signal processing, and embedded SoC design.
Compatible with open-source toolchains (Yosys, nextpnr) and commercial Lattice Diamond/Radiant flows, it supports drag-and-drop bitstream programming over USB and integrated UART for serial debug.
Design FilesProduct Details
32 MB · IS42S16160B
32 MB · W25Q256JV
Crystal
User SoC Debug
DAPLINK Debugger
106 user I/O
CDC Serial + DAP
ECP5 Programming
Specifications
| FPGA Device | Lattice ECP5 LFE5U-25F-6BG256C — BGA256, 0.8 mm pitch |
|---|---|
| Logic Capacity | 24,000 LUT4 equivalent logic cells |
| Embedded Block RAM | 1,008 Kb (56 × 18 Kb sysMEM blocks) |
| Distributed RAM | 194 Kb |
| DSP Resources | 28 × 18×18 multipliers |
| PLLs | 2 analog PLLs |
| External SDRAM | 32 MB · IS42S16160B-7TLI |
| SPI Flash | 32 MB · Winbond W25Q256JV |
| System Clock | 25 MHz crystal oscillator |
| User I/O | 106 pins exposed via SODIMM-DDR2-200P edge connector |
| Debug Interface | On-board iCELink DAPLINK debugger (APM32F1-based) · drag-and-drop bitstream programming · USB CDC serial |
| JTAG Interfaces | JTAG-1 (ECP5 programming) + JTAG-2 (user SoC debug) |
| Form Factor | Standard DDR2 SODIMM module (industry-compatible carrier boards) |
| Power Supply | USB Type-C (5 V, ≤ 500 mA typical) |
| Operating Temperature | 0 °C to +70 °C (Commercial) |
Key Features
- Low-Power FPGA Architecture ECP5 family delivers efficient logic density with industry-leading power efficiency for always-on applications.
- Open Toolchain Support Compatible with Yosys + nextpnr + Project Trellis open-source flow, alongside Lattice Diamond/Radiant.
- SODIMM Integration Industry-standard DDR2 form factor enables seamless integration into custom carrier boards.
- Integrated Debugger On-board iCELink (DAPLINK) provides drag-and-drop bitstream loading and USB CDC serial out of the box.
- Dual JTAG Path Separate JTAG-1 (FPGA config) and JTAG-2 (user SoC debug) for advanced multi-core RISC-V workflows.
- RISC-V Ready Sufficient logic, RAM and DSP resources for popular RV32I/IM soft cores including VexRiscv, PicoRV32 and Ibex.
Target Applications
- Defence & Aerospace
- Telecommunications
- Automotive Prototyping
- Industrial IoT
- Medical Instrumentation
- Academic Research
- Signal Processing
- RISC-V Development
- Edge AI / ML Inference
Design Resources
Documentation & Support
Comprehensive documentation including datasheets, hardware user guides, schematics, bill-of-materials, and reference projects is available through NovoComms Design Center. For technical support, integration consultation, or volume pricing, please contact our engineering team directly.
Services Available
- FPGA design and verification consulting
- Custom carrier board development & manufacturing
- RISC-V soft-core integration and porting
- Volume production with long-term supply commitment
- Application-specific customization (defence, automotive, medical)
Contact & Order
NovoComms Limited
Birmingham, United Kingdom